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ADE7761B
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
V DD 1
V 1A 2
V 1B 3
V 1N 4
20 F1
19 F2
18 CF
17 DGND
V 2N 5
V 2P 6
MISCAL 7
AGND 8
REF IN/OUT 9
SCF 10
ADE7761B
TOP VIEW
(Not to Scale)
16 REVP
15 FAULT
14 RCLKIN
13 PGA
12 S0
11 S1
Figure 3. Pin Configuration (SSOP)
Table 4. Pin Function Descriptions
Pin No.
1
2, 3
4
5
6
7
8
9
10
11, 12
13
14
Mnemonic
V DD
V 1A , V 1B
V 1N
V 2N
V 2P
MISCAL
AGND
REF IN/OUT
SCF
S1, S0
PGA
RCLKIN
Description
Power Supply. This pin provides the supply voltage for the digital circuitry in the ADE7761B. The supply voltage
should be maintained at 5 V ± 5% for specified operation. This pin should be decoupled with a 10 μF capacitor
in parallel with a ceramic 100 nF capacitor.
Analog Inputs for Channel V1 (Current Channel). These inputs are fully differential voltage inputs with maximum
differential input signal levels of ±660 mV with respect to V 1N for specified operation. The maximum signal level
at these pins is ±1 V with respect to AGND. Both inputs have internal ESD protection circuitry, and an overvoltage
of ±6 V can also be sustained on these inputs without risk of permanent damage.
Negative Input for Differential Voltage Inputs, V 1A and V 1B . The maximum signal level at this pin is ±1 V with respect
to AGND. The input has internal ESD protection circuitry, and an overvoltage of ±6 V can also be sustained on this
input without risk of permanent damage. The input should be directly connected to the burden resistor and held
at a fixed potential, that is, AGND. See the Analog Inputs section.
Negative Input for Differential Voltage Inputs, V 2P and MISCAL. The maximum signal level at this pin is ±1 V with
respect to AGND. The input has internal ESD protection circuitry, and an overvoltage of ±6 V can also be sustained
on this input without risk of permanent damage. The input should be held at a fixed potential, that is, AGND. See
the Analog Inputs section.
Analog Input for Channel V2 (Voltage Channel). This input is a fully differential voltage input with maximum
differential input signal levels of ±660 mV with respect to V 2N for specified operation. The maximum signal level at
this pin is ±1 V with respect to AGND. This input has internal ESD protection circuitry, and an overvoltage of ±6 V
can also be sustained on this input without risk of permanent damage.
Analog Input for Missing Neutral Calibration. This pin can be used to calibrate the CF, F 1 , and F 2 frequencies in the
missing neutral condition. This input is a fully differential voltage input with maximum differential input signal
levels of 660 mV with respect to V 2N for specified operation. The maximum signal level at this pin is ±1 V with respect
to AGND. This input has internal ESD protection circuitry, and an overvoltage of ±6 V can also be sustained on this
input without risk of permanent damage.
Analog Ground. This pin provides the ground reference for the analog circuitry in the ADE7761B, that is, ADCs and
reference. This pin should be tied to the analog ground plane of the PCB. The analog ground plane is the ground
reference for all analog circuitry such as antialiasing filters and current and voltage transducers. For good noise
suppression, the analog ground plane should be connected to the digital ground plane only at the DGND pin.
This pin provides access to the on-chip voltage reference. The on-chip reference has a nominal value of
2.5 V ± 8% and a typical temperature coefficient of 30 ppm/°C. An external reference source can also be
connected at this pin. In either case, this pin should be decoupled to AGND with a 1 μF ceramic capacitor and
100 nF ceramic capacitor.
Select Calibration Frequency. This logic input is used to select the frequency on the Calibration Output CF.
Table 7 shows how the calibration frequencies are selected.
These logic inputs are used to select one of four possible frequencies for the digital-to-frequency conversion.
This offers the designer greater flexibility when designing the energy meter. See the Selecting a Frequency for an
Energy Meter Application section.
This logic input is used to select the gain for the analog inputs, V 1A and V 1B . The possible gains are 1 and 16.
To enable the internal oscillator as a clock source on the chip, a precise low temperature drift resistor at
a nominal value of 6.2 kΩ must be connected from this pin to DGND.
Rev. 0 | Page 6 of 24
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